Design-Reuse9h
Frontgrade Gaisler Leads European Initiative for Ultra Deep Sub-Micron Semiconductor Technology for Space Applications
As part of the ESA-backed “EEE Space Component Sovereignty for Europe” program, Frontgrade Gaisler is collaborating with key ...
Design-Reuse11h
Enhancing IoT System Performance with Smart Memory Partitioning
Low-power design is critical, especially for chips inside battery-operated IoT devices that must support applications for ...
Design-Reuse12h
Frontgrade Gaisler Licenses BrainChip's Akida IP to Deploy AI Chips into Space
BrainChip today announced that Frontgrade Gaisler, a leading provider of radiation-hardened microprocessors for space ...
Design-Reuse13h
A Rad Hard ASIC Design Approach: Triple Modular Redundancy (TMR)
TMR is not a new idea in the world of ASIC design. It was published as far back as 1962 in the IBM Journal of Research and ...
Design-Reuse10h
From Concept to Reality: Understanding the Cadence Analog IC Design Flow
Have you ever wondered how your smartphone can capture stunning photos, play crystal-clear music, or accurately measure your heart rate? The answer lies ...
Design-Reuse15h
Industry Grade ASIL-B IP Cores licensed to Power Next-Gen Automotive Systems
T2M IP proudly announces the licensing of a comprehensive ASIL - B IP portfolio to its key Automotive customer, designed to deliver superior performance, scalability, and compliance with ISO 26262 ...
Design-Reuse9h
Rapidus Collaborates with Synopsys to Shorten Semiconductor Design Cycles
As part of the agreement, Synopsys will develop advanced design flows leveraging its AI-driven EDA suite and enable a broad IP portfolio on Rapidus’ 2nm gate-all-around (GAA) process.