The DDR3/2 PHY is compatible with JEDEC DDR3 ... read/write data eye timing. The DDR IP is silicon proven. The PHY is optimized for high performance, low latency, low area, low power, ease of ...

supports DRAM type DDR3, DDR3L this PHY provides low latency, and enables up to 1600Mbps throughput. The DDR IP is compliant with the latest JEDEC standards and is silicon proven. The PHY is optimized ...