Active interposers with transistors will gradually replace passive interposers, driving the transition to vertical stacking.

Over the past few years, we have seen a lot of AI-market-related ... logic and TSMC CoWoS capacity than everyone else. The ...

AI can help with workload distributions when considering on-device versus cloud processing. The latter has a very large ...

More than 70% of TSMC’s CoWoS-L advanced packaging capacity has already been booked, fueled by strong demand for Nvidia’s Blackwell GPUs. This surge is also driving orders to major backend ...

What Happened: Market chatter suggested that Nvidia's CoWoS wafer orders at TSMC had been cut from over 400,000 wafers to 380,000 wafers, fueling concerns about AI demand fluctuations. However ...

Market speculation about a slowdown in AI chip demand is mounting, with concerns fueled by scaled-back data center plans from major CPE manufacturers and downward revisions in CoWoS capacity needs.

To represent typical AI/HPC/Networking chip conditions, multiple instances of HBM3, 112G-LR SerDes and GLink-2.5D IPs were integrated into this big die CoWoS platform with high power consumption. GUC ...

"Delivering the industry's first wafer level burn-in solution for the AI processor market marks a major milestone for Aehr, opening a significant new market opportunity for our FOX-XP wafer level ...

These cutting-edge memory chips are integral to the computing infrastructure needed for artificial intelligence (AI) projects ...

A rather unexpected metric is perhaps the one from Morgan Stanley (via @Jukanlosreve) that counts the wafer consumption of AI processors ... more TSMC logic and TSMC CoWoS capacity than everyone ...